サトウ　ノブオ   Satoh Nobuo   佐藤　宣夫    所属   千葉工業大学  工学部 機械電子創成工学科    千葉工業大学  工学研究科 工学専攻    千葉工業大学  工学研究科 機械電子創成工学専攻    職種   教授
言語種別	英語
発行・発表の年月	2018/07
形態種別	学術雑誌
標題	Investigation of an n-layer in a silicon fast recovery diode under applied bias voltages using Kelvin probe force microscopy
執筆形態	共著
掲載誌名	Japanese Journal of Applied Physics,
巻・号・頁	Volume 57(Number 8S1)
概要	We have imaged an n− layer of a commercial silicon fast recovery diode (Si-FRD) under applied bias voltages using frequency modulation atomic force microscopy and Kelvin probe force microscopy. It was possible to image the potential contrast of the exposed active region surface of the Si-FRD owing to the dominant behavior of carriers induced by applying the bias voltages. Under applied reverse bias voltages, potential contrasts at a pn− junction were recognized in potential images. At the applied forward bias voltage of 1.5 V, a potential drop at an n−n interface under conductivity modulation was clearly observed in a potential image. From the distance between the pn− junction and the n−n interface, the n− layer width of a power device was determined to be 36.6 µm.