オオニシ　タカユキ   Takayuki Onishi   大西　隆之    所属   千葉工業大学  情報変革科学部 情報工学科    職種   教授
発行・発表の年月	2003
形態種別	国際会議プロシーディングス
査読	査読あり
標題	A 1.1 W single-chip MPEG-2 HDTV CODEC LSI for embedding in consumer-oriented mobile CODEC systems
執筆形態	共著
掲載誌名	Proceedings of the Custom Integrated Circuits Conference
掲載区分	国外
巻・号・頁	177-180頁
著者・共著者	Hiroe Iwasaki,Jiro Naganuma,Yasuyuki Nakajima,Yutaka Tashiro,Ken Nakamura,Takeshi Yoshitome,Takayuki Onishi,Mitsuo Ikeda,Takaaki Izuoka,Makoto Endo
概要	This paper proposes a 1.1 W single-chip MPEG-2 HDTV codec LSI for embedding in consumer-oriented mobile codec systems, and demonstrates its flexibility and usefulness. This architecture consists of a half-duplex 720/30P encoding core, a half-duplex 1080I decoding core, an audio DSP, a RISC, and a multiplexer/de-multiplexer core with a dual-memory scheme for supplying data at high speeds. The LSI, which integrates 3.8 million transistors on a 9.7 mm × 9.7 mm die using the 0.13-μm seven-metal CMOS process, implements 720/30P encoding with 1.1 W, 1080I decoding with 0.8 W, and full-duplex 480P encoding and decoding simultaneously with 1.4 W. This LSI will make it possible for consumers to use HDTV quality equipment on a more widespread scale.
ISSN	0886-5930