クマタニ　アキチカ   Akichika Kumatani   熊谷　明哉    所属   千葉工業大学  工学部 電気電子工学科    千葉工業大学  工学研究科 工学専攻    職種   教授
言語種別	英語
発行・発表の年月	2010/07
形態種別	学術雑誌
標題	Low Operating Bias and Matched Input-Output Characteristics in Graphene Logic Inverters
執筆形態	共著
掲載誌名	NANO LETTERS
掲載区分	国外
出版社・発行元	American Chemical Society
巻・号・頁	10(7),pp.2357-2362
著者・共著者	Song-Lin Li,Hisao Miyazaki,Akichika Kumatani,Akinobu Kanda,Kazuhito Tsukagoshi
概要	We developed a simple and novel method to fabricate complementary-like logic inverters based on ambipolar graphene held-effect transistors (FETs) We found that the top gate stacks (with both the metal and oxide layers) can be simply prepared with only one-step deposition process and show high capacitive efficiency By employing such a top gate as the operating terminal, the operating bias can be lowered within 2 V In addition, the complementary p- and n-type FET pairs can be also simply fulfilled through potential superposition effect from the drain bias The inverters can be operated. with up to 4-7 voltage gains, in both the first and third quadrants due to the ambipolarity of graphene FETs For the first time, a match between the input and output voltages is achieved in graphene logic devices, indicating the potential in direct cascading of multiple devices for future nanoelectronic applications
DOI	10.1021/nl100031x
ISSN	1530-6984
PMID	20518487