オオニシ　タカユキ   Takayuki Onishi   大西　隆之    所属   千葉工業大学  情報変革科学部 情報工学科    職種   教授
発行・発表の年月	2007/09
形態種別	学術雑誌
査読	査読あり
標題	Single-chip MPEG-2 422P@HL CODEC LSI with multichip configuration for large scale processing beyond HDTV level
執筆形態	共著
掲載誌名	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
掲載区分	国外
巻・号・頁	15(9),1055-1059頁
著者・共著者	Hiroe Iwasaki,Jiro Naganuma,Koyo Nitta,Ken Nakamura,Takeshi Yoshitome,Mitsuo Ogura,Yasuyuki Nakajima,Yutaka Tashiro,Takayuki Onishi,Mitsuo Ikeda,Toshihiro Minami,Makoto Endo,Yoshiyuki Yashima
概要	This paper proposes a new architecture for VASA, a single-chip MPEG-2 422P@HL CODEC LSI with multichip configuration for large scale processing beyond the HDTV level, and demonstrates its flexibility and usefulness. VASA is the world's first single-chip full-specs MPEG-2 422P@HL CODEC LSI with a multichip configuration. An LSI was successfully fabricated using the 0.13-μm eight-metal CMOS process. The architecture not only provides an MPEG-2 422P@HL CODEC but also large scale processing beyond the HDTV level for digital cinema and multiview/-angled live TV applications with a multichip configuration. The VASA implementations will lead to a new dimension in future high-quality, high-resolution digital multimedia entertainment. © 2007 IEEE.
DOI	10.1109/TVLSI.2007.902212
ISSN	1063-8210